GATE|GATE-CS-2014|Question-2
Consider the following processors(ns stand for nanoseconds).Assume that the pipeline registers have zero latency.
P1: Four stage pipeline with stage latencies 1ns,2ns,2ns,1ns.
P2: Four stage pipeline with stage latencies 1ns,1.5ns,1.5ns,1.5ns.
P3: Five stage pipeline with stage latencies 0.5ns,1ns,1ns,0.6ns,1ns.
P4: Five stage pipeline with stage latencies 0.5ns,0.5ns,1ns,1ns,1.1ns.
Which processor has the highest peak clock frequency?
(A) P1
(B) P2
(C) P3
(D) P4
Answer (C)
Clock period(CP)=max stage delay+overhead.
So CP(p1)=Max(1,2,2,1)=2ns
CP(p2)=Max(1,1.5,1.5,1.5)=1.5ns
CP(p3)=Max(0.5,1,1,0.6,1)=1ns
CP(p4)=Max(0.5,0.5,1,1,1.1)=1.1ns
As frquency ∝ 1/CP so least clock period will give the highest peak clock frequency.
So f(p3)=1/1ns=1GHz
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